The Market Leader in Advanced Package Design
IC Package Design
Cadence has led IC packaging since the start — a dedicated platform built for the most advanced packages: wirebond, flip-chip, BGA, CSP, WLP, FOWLP, PoP, 3D-IC, and RF modules. Plus EM model extraction for downstream SI / PI / thermal analysis.
Overview
A Complete Design Flow for Effective Package Design
Cadence has been leading the way in package design since the start, with a dedicated, focused effort on building solutions to meet current and future packaging technology needs. With countless successful tape-outs from all processes, the platform is built to enable your packaging effort to become a key value center.
New system-in-package (SiP) technologies like silicon interposers, 3D-IC, and stacked die enable companies to achieve performance, cost, and schedule requirements that wouldn't otherwise be possible — without trying to rewrite the physics textbook.
Complete Design Flow
End-to-end package design from concept to tape-out — wirebond, flip-chip, WLP, 3D-IC.
3D-IC & Heterogeneous
Support for 3D-IC and heterogeneous integration implementations across multiple fabrics.
In-Design Analysis
SI, PI, and thermal analysis built into the design loop — catch issues before tape-out.
Production-Proven
Tested on the world's most complex IC packaging — countless successful tape-outs to back it up.
Products
Two Tools for IC Package Design
Design with APD. Extract accurate EM models with XtractIM. Together — a complete IC package design and analysis flow.
Allegro X APD
The market-leading IC package design platform — built specifically for advanced packaging technologies.
Sigrity XtractIM
EM model extraction built for high-performance package and IC design — accurate models for downstream analysis.
Technology Coverage
Any Technology. Any Process.
The most comprehensive support for the latest packaging technologies — proven on countless designs at the most advanced nodes.
Lead Frame
Mechanical interfaces and advanced wirebonding.
Wirebond PBGA
2D & 3D DRC checking; all-angle / radial routing.
Flip Chip BGA
High-capacity HDI structures & routing.
Chip Scale Package (CSP)
Die stacking, HDI structures & routing.
Fan-in WLP (WLCSP)
Merged IC & package layout with GDSII output.
Fan-Out WLP (FOWLP)
Advanced outgassing with GDSII output.
Package on Package (PoP)
3D visualization & DRC, auto signal assignment.
RF Module
Virtuoso integration, parametrized structures.
More Than Moore
When the Physics Textbook Says No, Packaging Says Yes
The laws of physics are just one barrier straining Moore's Law. New system-in-package technologies — silicon interposers, 3D-IC, stacked die — enable companies to achieve the performance, cost, and schedule requirements they need without rewriting physics.
Multi-fabric chip / package / board
- Silicon interposers
- 3D-IC
- Stacked die
- 2.5D / chiplet integration
- SiP & RF modules
Works Well With
Complementary Cadence Tools
Clarity 3D EM Solver
Robust, full-wave EM simulation for high-frequency systems — accurate FEM for true 3D modelling of critical interconnects, PCBs, SoIC, and packages.
Celsius Thermal Solver
Comprehensive thermal and electrothermal analysis for accurate system-level simulations of packages and 3D-ICs.
Allegro SystemCapture
Streamline schematic development with collaborative team design, efficient part management, integrated auditing and simulation.
FAQs
IC Package Design — Common Questions
APD (Advanced Package Designer) is purpose-built for IC packaging — wirebond, flip-chip BGA, fan-in/fan-out WLP, PoP, and 3D-IC. Allegro X PCB Editor handles board-level PCB layout. They share the same platform foundation and are complementary tools — many designs need both.
XtractIM extracts hyper-accurate electromagnetic (EM) models from IC package designs. Those models then feed downstream Sigrity SI, PI, and thermal simulations — so you can characterise interconnect behaviour before silicon arrives.
Yes — APD is a complete package design tool on its own. XtractIM is the recommended add-on when you need post-layout EM characterisation for SI / PI / thermal signoff.
Lead Frame, Wirebond PBGA, Flip Chip BGA, Chip Scale Package (CSP), Fan-in WLP (WLCSP), Fan-Out WLP (FOWLP), Package on Package (PoP), and RF Module. Plus 3D-IC, stacked die, and silicon interposer flows.
Yes — direct connections to Virtuoso (analog/custom IC) and Innovus (digital implementation) enable true chip / package / board co-design. Plus tight integration with Allegro for board-level analysis.
Yes — APD supports 3D-IC, heterogeneous integration, silicon interposers, and chiplet flows including bump-to-ball assignment optimization.
Yes — contact Craftronics for evaluation setup and India-specific licensing for both APD and XtractIM.
Get Started
Bring Your Next IC Package Design to Production Faster
Talk to Craftronics about Allegro X APD and Sigrity XtractIM — India-specific licensing, training, and implementation support.